ACE_CSR_ NCSC_logo_banner_v3For over a decade, our researchers remain committed to their ethos of tackling cyber security challenges that are important to society. Working in collaboration with academia, industry and government, our researchers consistently produces internationally leading research on key issues that has led to the University of Birmingham being recognised as an NCSC-EPSRC Academic Centre of Excellence in Cyber Security Research, part of an elite network of academic institutions that are committed to engaging in cutting-edge cyber security research.

Current Projects

Cyber Security for the Vehicles of Tomorrow

Flavio Garcia

Connected and autonomous vehicles are set to revolutionise our transportation and re-shape our cities. They will prevent accidents, reduce parking space requirements, lower congestion and pollution. But in order to achieve this, they need several sensors and wireless interfaces which connect them with other vehicles, consumer devices, infrastructure and the Internet. This connectivity adds great functionality but it also introduces a myriad of security and privacy threats. Safety critical functionality in the vehicle is controlled by a multitude of Electronic Control Units (ECUs) which are fully programmable. As vehicles become more programmable, complex and interconnected, they also become more vulnerable to cyber attacks.

Improving vehicle security

The main goal of this fellowship is to secure connected and autonomous vehicles, making them resilient to this type of attacks. We will achieve this goal by developing techniques to secure each component of the vehicle's electronic architecture: ensuring that each ECU only executes code that is suitably authenticated; using model learning techniques to develop a framework for automated security testing of ECUs in a way that it scales; securing the vehicle's sensors such as radar, lidar and optical cameras against signal spoofing, tampering and denial of service attacks which would cause them to output inaccurate readings; and improving the communication protocols between vehicles and between the vehicles and the infrastructure in order to provide authenticity, non-repudiation and privacy while complying with stringent real-time constraints.

This project is funded by an EPSRC Fellowship.

User-controlled hardware security anchors: evaluation and designs

Mark RyanFlavio GarciaDavid Oswald

Many modern processors are equipped with hardware extensions that enable some kind of Trusted Execution Environment (TEE). This allows programs to run securely - protected from other programs or operating system software running on the processor. By establishing a secure interface between the user and the hardware-anchor, we can make user platforms and devices more resilient to malware and other types of cyber attacks.

One of the main goals of this project is to promote and facilitate the adoption of TEE as the main trust anchor for our security architectures. As such, the security of the TEEs themselves is of paramount importance. We will perform a thorough evaluation of the security features of different TEE implementations to determine their suitability as trust anchors. This includes assessing cryptographic protocols, side-channel vulnerabilities, and implementation weaknesses.

Hardware supported TEEs aim to ensure that code can execute securely. However, user interface devices (for example, a keyboard, display or touch screen) are usually not connected directly to the secure hardware, which means that the user cannot interact securely with the TEE. We will address the limitations of users interacting directly with TEEs through analysing use cases and developing secure interfaces using auxiliary devices and dedicated features.

Authentication today is largely based on user supplied information like passwords or biometrics. These approaches often use information that is easy to steal or brute force. The industry has been moving towards multi-factor authentication as a means of spreading risk, but these approaches impose usability challenges while still relying on weak factors. We will investigate opportunities to leverage strong hardware-based security mechanisms to improve both the strength and usability of authentication. We will also build an architecture for designing protocols and user experiences that leverage these hardware security primitives to enhance the security, manageability, and usability of user authentication over existing approaches.

The analysis and applications of our research findings will be demonstrated and implemented on suitable platforms including secure hardware, smart devices and integration with authentication tokens.

This project is funded by the EPSRC as part of the new £5million UK Research Institute in Secure Hardware and Embedded Systems (RISE) led by CSIT at Queen's University Belfast and including the University of Cambridge and the University of Bristol.


Mark RyanDavid GalindoDavid Oswald

The goal of FutureTPM is to design a quantum-resistant (QR) Trusted Platform Module (TPM) by designing and developing QR algorithms suitable for integration in a TPM. The algorithm design will be accompanied with implementations and performance and security evaluations, Professor Mark Ryan as well as formal security analyses in the full range of TPM environments: hardware, software and virtual. The lead users will be in the online banking, activity tracking and device management domains, which will provide environments and applications to validate the FutureTPM framework.

Security, privacy and trust in a computing system are usually achieved using tamper-resistant devices to provide core cryptographic and security functions. The TPM is one such device and provides the system with a root-of-trust and cryptographic engine. However, to sustain enhanced security posture, it is crucial that the crypto functions in the TPM are not merely secure for today but will also remain secure in the long-term against quantum attacks.

FutureTPM will address this challenge by providing a new generation of TPM solutions, incorporating robust and provably-secure QR algorithms. Research on QC has drawn enormous attention from governments and industry; if, as predicted, a large-scale quantum computer becomes a reality within the next 15 years, existing public-key algorithms will be open to attack. Therefore, a smooth transition to QR cryptography is required, since history shows that any significant change takes time and requires theoretical and practical research before adoption. A key strategic objective of FutureTPM is to contribute to standardization efforts at EU level within TCG, ISO and ETSI. The consortium consists of high caliber industrial and academic partners from across Europe combining QR crypto researchers with TPM developers. Because the TPM shares many functions in common with other widely-used devices--such as HSMs or TEEs--the FutureTPM solution is expected to benefit them as well.

Project partners include:

  • University of Surrey (technical lead)
  • Technikon (coordinator)
  • University of Luxembourg
  • IBM Research
  • Royal Holloway, University of London
  • Ubitech
  • Infineon Technologies
  • Suite5 Data Intelligence Sollutions
  • INESC-ID, Lisbon
  • University of Piraeus Research Centre
  • Huawei Technologies Dusseldorf
  • Viva Payment Services

The University of Birmingham will be contributing research into security requirements and properties, post-quantum cryptography, security verificationa and analysis, and run-time vulnerability analysis.

The FutureTPM project has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement No 779391.

Effective Solutions for the NIS Directive - Supply Chain Requirements for Third Party Devices

Tom Chothia, Richard Thomas

This project will deliver a methodology and framework that will enable ICS operators to quickly and effectively verify the security of 3rd party devices. Such COTS devices can often compromise the security of an otherwise well-designed system.

These devices can often be hard to check, because the source code and design is often not available, and sometimes not even known the to the supplier of the device. We will ease the challenge such checking imposes to obtain NIS compliance by providing detailed guidance and analysis on the best methods of checking such components. This will be based on our experience of such analysis and validated by new analysis of common ICS components. This will lead to a body of knowledge that ICS owners could use to review potential issues that may exist in their systems, as well as providing contextual information about the source of that vulnerability and how it may be mitigated.

We will use this body of knowledge to compare different assessment methods and provide the results as a report that ICS owners can used to decide on the most effective analysis methods, for their needs. We will also investigate automatic analysis methods, such as common scanning tools and also more advanced research tools that could be used by ICS owners to analyse their systems without requiring major resources and expertise. We will assess such tools on a range of ICS components, and again provide guidance to ICS owners on their use and effectiveness.

Isogeny-Based Cryptography: From Theory to Practice

Christophe Petit, Sujoy Sinha Roy

The security of many cryptographic protocols in use today relies on the computational hardness of mathematical problems such as integer factorization. These problems can be solved using quantum computers, and therefore most of our security infrastructures will become completely insecure once quantum computers are built. Post-quantum cryptography aims at developing security protocols that will remain secure even after quantum computers are built. The biggest security agencies in the world including GCHQ and the NSA have recommended a move towards post-quantum protocols, and the new generation of cryptographic standards will aim at post-quantum security.

This project will consider cryptography based on isogeny problems, a particular family of protocols that are considered for post-quantum security. Isogeny-based protocols are particularly appealing for three reasons 1) they require very small keys compared to other post-quantum cryptography candidates, saving on bandwidth and storage 2) there exists an isogeny-based version of the widely used Diffie-Hellman protocol, which can be used as a direct replacement of current instantiations 3) their mathematical grounding has a lot in common with currently used elliptic curve protocols, which will accelerate implementations in a wide range of devices.

Isogeny-based cryptography protocols have only been invented recently, and like many other protocols currently investigated for post-quantum security they yet have to survive the "test of time". As they have not been investigated as thoroughly as currently deployed solutions, they may be more vulnerable to unanticipated weaknesses. Moreover, the protocols are still at the stage of theoretical papers and remain to be evaluated against the specific constraints of real-life applications.

This project will advance the field of isogeny-based cryptography, from its mathematical grounding right up to the application of protocols in the real world. We will develop new protocols, new analysis techniques, and determine the suitability of isogeny-based cryptography for selected applications.

TimeTrust: Robust Timing Via Hardware Roots Of Trust And Non-standard Hardware - With Application To EMV Contactless Payments

Tom Chothia

TimeTrust will augment trusted hardware such as TPMs (Trusted Platform Modules) with new functionalities linked to time-reporting (essential in proximity checking), and feed these into enhancements of TPM’s cryptographic primitives such dynamic directed attestation (DAA), originally developed by one of our Co-Is. Moreover, TimeTrust will augment HW-RoT with new attestation protocols. Subsequently, we will pursue these directions with software-based HSMs (Hardware Security Modules) such as virtual TPMs (vTPMs) and Trusted Execution Environments (TEEs) running on non-standard hardware (ns-HW). By non-standard hardware, herein, we mean hardware that is not purposely dedicated to contactless communications (as are cards and readers following ISO/IEC 14443, or e.g., certain NXP-manufactured devices).

Aspects of users’ privacy inherent in (proxied) distancebounding will also be investigated. Clearly, TimeTrust will yield new secure systems based on enhanced TPMs, vTPMs and TEEs. For these, we will also develop novel techniques and tools for formal security-analysis. 

Accelerating Homomorphic Computing On Encrypted Data Using FPGAs

Sujoy Roy Sinha

Machine Learning as a Service is a promising solution for cloud-based inference applications. However, it faces privacy issues. To compute a model, either the user needs to provide its sensitive data to the model owner (e.g., in the cloud); or the model owner needs to reveal its model to the user.

Homomorphic Encryption (HE) is an elegant cryptographic solution to prevent invasion of privacy while keeping the conveniences of cloud computing. Using HE, user can upload its encrypted data to the cloud and can still perform computation (e.g., evaluate a model) on the encrypted data. However, software implementations of HE are very slow. This project aims to design an accelerator for homomorphic computing on encrypted data.

Specifically, we will design a hardware/software codesign library, targeting new-generation CPU-FPGA heterogeneous platforms, for the state-of-the-art Fully Homomorphic Encryption scheme over Torus (TFHE). TFHE demonstrates fast ‘bootstrapping’ for refreshing encrypted data. We will design high-speed and parallel algorithms for the building blocks used in TFHE, reduce on-chip memory access and off-chip communication overheads, and introduce parallel processing at different layers of the implementation hierarchy.

We will implement the accelerator on Amazon EC2 F1 which is a heterogeneous platform, consisting of CPUs and FPGAs. Using the accelerator, we will homomorphically evaluate Neural Networks on encrypted datasets.

Past Projects

To view our archive, please visit the University of Birmingham's Research Portal.


A full list of our research papers is available.